1) Field of the Invention
This invention relates generally to the fabrication of contacts for semiconductor devices and more particularly to a method of forming a deep contact hole and plug using a hard mask.
2) Description of the Prior Art
As semiconductor devices shrink, the contact holes have smaller diameters and are deeper. This increases the aspect ratio of the contact holes. Forming high aspect ratio contact holes and filling the holes with metal to form contacts creates challenges for the semiconductor industry.
To form deep contact holes with deep submicron feature size and high aspect ratio requires a high density plasma etching process. Also, to form small diameter contact holes, a thin photoresist layer is required. However, The inventors have found that the high density plasma etch's low selectivity between the photoresist and the inter-layer dielectric (ILD) makes the complete etching of contact hole difficult. This is because the thin photoresist can be etched away and the underlying insulating layer also etched. This lowers device yields. To alleviate the overetching of the thin photoresist, the inventors implemented a "hard mask" 114 etch process.
The inventors have found problems with their current method for forming contact openings using hard masks (not prior art for this patent). As shown in FIGS. 10A through 10C, a contact hole 115 is formed in an insulating layer 113 and is filled with a metal plug 117. FIG. 10A shows an insulating layer 113 formed over a substrate 10 having a doped region 112. Next, a hard mask 114 is formed over the in insulating layer 113. A contact opening 115 is etched in the hard mask 114 and insulating layer 113.
FIG. 10B shows the removal of the hard mask 114. However, the inventors have found this creates a first problem (** problem 1**) . The removal of the hard mask, prior to the plug 117 formation, has been found by the inventors to contaminate the contact opening 115 and lower yields. In some of the inventor's processes, a photoresist layer is formed in the contact hole 115 to protect the substrate from RIE etch damage from the RIE etch that is used to remove the hard mask 114. This photoresist layer often can't be completely removed thus leaving a "residual photoresist" in the contact hole 115. This "residual photoresist" reduces yields.
Next, FIG. 10B shows the formation of a glue layer 116 in the contact hole 115 and the substrate 10. Next a metal layer 117 is formed filling the contact hole 115.
Next, the metal layer 117 and glue layer 116 are etched back. The inventors have found that this etch back creates a second problem (** Problem 2**). To remove all the metal layer and glue layer over the insulating layer, the metal layer 117 must be over etched, thus creating a recess 120 in the plug 117. The recess 120 has been found by the inventors to lower yields.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering U.S. Pat. No. 5,633,201 (Choi) that teaches a method for forming tungsten (or aluminum) plugs in contact holes including depositing tungsten (or aluminum) using two selective metal deposition processes to fill two openings. U.S. Pat. No. 5,534,462 (Fiordalice) shows a conductive plug is formed in a semiconductor device by using an aluminum nitride glue layer and a hard mask. U.S. Pat. No. 5,654,240 (Lee) shows a method of fabrication for forming contacts to sources and drains. A dielectric and an overlying polysilicon conductor are formed and patterned thereby exposing a semiconductor substrate. A silicide layer is deposited, thereby contacting the polysilicon layer and the substrate. Subsequent patterning of the silicide layer using an oxide hard mask provides electrical contact between the polysilicon layer and the substrate without the risk of trenching into the substrate. However, these patents can be further improved.